All pull requests

Pull requests

• SMV P3: Inter typography, Ua time-axis, phasor angles, publisher sync and guarded 3-phase power

  #714·masarray opened Oct 23, 2026Owner·

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  1

• FAT ctlModel Write: compact Material editor and reconnect-safe one-shot confirmation

  #713·masarray opened Oct 23, 2026Owner·

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  1

• SMV P2: RMS integrity, phase alignment, restored zero axes & phase-attached cursor callouts

  #711·masarray opened Oct 23, 2026Owner·

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  5

• FAT Write UX: unify live-value editors, Boolean choices and Material Write

  #710·masarray opened Oct 23, 2026Owner·

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  2

• SMV Measurements: restore blue-white grid and split voltage/current beside each other

  #708·masarray opened Oct 23, 2026Owner·

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  2

• SSOT v2 Phase 4 — eliminate fat Global sorting and debounce Explorer search

  #705·masarray opened Oct 23, 2026Owner·

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  5

• SSOT v2 Phase 3 — prioritize realized Explorer/Global Live rows under SG7 backlog

  #703·masarray opened Oct 23, 2026Owner·

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  1

• SSOT v2 Phase 2 — reactive IED Browser viewport and canonical dirty-row projection

  #698·masarray opened Oct 23, 2026Owner·

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  3

• SSOT v2 Phase 1 — shared IEC model index and canonical multi-workspace change journal

  #695·masarray opened Oct 23, 2026Owner·

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  3

• P0 SG7_BCU: async Browser model indexing, bounded metrics and CF-aware units

  #688·masarray opened Oct 23, 2026Owner·

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  5

• FAST FAT EXE: compact Smart IP UI + SG7 staging engine (no ZIP)

  ci-p1-shadow
  #687·masarray opened Oct 23, 2026Owner·

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  1

• SG7_BCU: bounded scrollable Command Dock and guarded Browser MMS DA Write

  ci-p1-shadow
  #686·masarray opened Oct 23, 2026Owner·

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  1

• fix(P0 SMV): integrate real ARStack Ethernet into latest IED/UI and consolidate CI

  #680·masarray opened Oct 22, 2026Owner·

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• FAT P0 integration checkpoint: invalid quality vector in Browser and Device Explorer

  #679·masarray opened Oct 22, 2026Owner·

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  20

• Fast workflow: download PR portable .exe directly from Actions, no ZIP

  #677·masarray opened Oct 22, 2026Owner·

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• fix(SMV): accept real ARStack captured Ethernet and preserve waveform across AUTO sync 0→2

  #675·masarray opened Oct 22, 2026Owner·

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  3

• P0 GR_X SCD: exact CSWI CO/live MMS parity, explicit selector and bounded diagnostics

  #674·masarray opened Oct 22, 2026Owner·

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• P0 GR_X: make CSWI control candidates discoverable independently of XCBR/XSWI status

  #673·masarray opened Oct 22, 2026Owner·

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• P0 GR_X: live-verify cross-DataSet CSWI.Pos in Command Dock (no unsafe status-only bypass)

  #672·masarray opened Oct 22, 2026Owner·

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• SMV: sharp waveform, compact capture toolbar on latest P0 IED checkpoint

  #671·masarray opened Oct 22, 2026Owner·

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  1

• SMV P1/P2: coherent viewer plus passive live multi-stream monitoring

  #667·masarray opened Oct 21, 2026Owner·

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• BLOCKED P0 SBO timing FAT trial: exact engine #187 pin requires provenance-guard qualification

  #666·masarray opened Oct 21, 2026Owner·

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• P0 SIEBCU: command must not queue, phase-smart Device Explorer labels, engine discovery follow-up

  #663·masarray opened Oct 21, 2026Owner·

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  2

• CI/FAT: direct EXE preview asset distribution with explicit manual public prerelease gate

  #660·masarray opened Oct 21, 2026Owner·

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• P0 Data Model: cross-IED typed SG parent scalar reuse + bounded non-scalar child evidence

  #659·masarray opened Oct 21, 2026Owner·

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  1